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 3.1.1. POWER Service Layer

 A CAIA-compliant processor includes a POWER Service Layer. The PSL is the bridge to the system for the AFU, and it provides the address translation and system memory cache for the AFUs. In addition, the PSL provides miscellaneous facilities for the host processor to manage the virtualization of the AFUs, interrupts, and memory management.

 The PSL consist of several functional units (such as the memory-protection tables). Hardware resources defined in the CAIA are mapped explicitly to the real address space seen by the host processor. Therefore, any host processor can address any of these resources directly by using an appropriate effective address value. A primary function of the PSL is the physical separation of the AFUs so they appear to the system as independent units.

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