Revision history   OpenPOWER Library

 10.1.24. PSL SLB Invalidate Entry Register (PSL_SLBIE)    

 A write to the PSL SLB Invalidate Entry Register (PSL_SLBIE) causes the Valid (V) bit in all entries of the SLB that match the ESID, class, and segment size to be set to '0'. For any value other than '00' in the invalidation qualifier (IQ) field, the PSL_LBISEL Register must be written before writing the PSL_SLBIE Register.

 When an AFU is in a shared programming mode, the operating system does not have direct access to the privileged 2 SLB Invalidate Entry Register (SLBIE_An) facility to invalidate segment translations. In this case, the operating systems request the hypervisor to perform the segment translation invalidations on behalf of operating system using the privileged 1 PSL SLB Invalidate Entry Register (PSL_SLBIE) facility.

 There is only one register for the PSL. Access to this register should be privileged. This register must be accessed using a single 64-bit store operation.

Address

Write

 Base Address Offset

 P1_Base + x'0088'

 Register Write Field Description:

 ESID

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

ESID

C

SS

Reserved

IQ

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

Bits

Field Name

Description

 0:35

 ESID

 Effective segment ID.

 36

 C

 Class.

 The class field is used in conjunction with the PSL SLB Invalidate Entry Register (PSL_SLBIE) . It is used as an additional qualifier for the ESID when multiple virtual address spaces exist.

 37:38

 SS

 Segment size.

 The segment size field is used in conjunction with the PSL SLB Invalidate Entry Register (PSL_SLBIE) . It is used as an additional qualifier for the ESID when multiple virtual address spaces exist.

 39:61

 Reserved

 Set to zeros.

 62:63

 IQ

 SLB invalidation qualifier (IQ).

 The IQ field is used to selectively invalidate only the SLB entries based on the (ESID, ESID, and LPID) or (ESID, PID, and LPID) combination. The value for the PID and LPID is defined by the PSL_LBISEL Registers.

00

Invalidate the SLBs matching the ESID.

01

Invalidate the SLBs matching the ESID and LPID.

11

Invalidate the SLBs matching the ESID, LPID, and PID.

 Register Read Field Description:

 Reserved

 Max_SLBIEs

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

Reserved

SLBIEs_Pending

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

Bits

Field Name

Description

 0:23

 Reserved

 Set to zeros.

 24:31

 Max_SLBIEs

 Maximum number of SLBIE commands supported.

 This field indicates the maximum number of outstanding SLB invalidate entry commands supported. This value of this field is implementation dependent.

 32:55

 Reserved

 Set to zeros.

 56:63

 SLBIEs_Pending

 Number of SLBIE command pending.

 The SLBIEs_Pending field indicates the number of SLBIE commands currently outstanding. This field is used to determine when the previously issued SLB invalidations are complete. Issuing any additional SLB invalidates (that is, writing this register) when the number of invalidation pending is at the maximum can result in an SLB invalidate being lost or discarded.

 x'00' No SLB invalidate entry commands are pending.

 x'01' One SLB invalidate entry command is pending.

 ...

 x'FF' 255 SLB invalidateentry commands still pending.

x'00'

No SLB invalidate entry commands are pending.

x'01'

One SLB invalidate entry command is pending.

...

x'FF'

255 SLB invalidateentry commands still pending.


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