Revision history   OpenPOWER Library

 10.1.25. PSL SLB Invalidate All Register (PSL_SLBIA)

 A write to the PSL SLB Invalidate All Register (PSL_SLBIA) causes the valid (V) bit in all entries of the SLB to be set to '0', making the entries invalid. The remaining fields of each entry are undefined. For any value other than '00' in the invalidation qualifier (IQ) field, the PSL_LBISEL Register must be written before writing the PSL_SLBIA Register.

 When an AFU is in a shared programming mode, the operating system does not have direct access to the privileged 2 SLB Invalidate All Register (SLBIA_An) facility to invalidate segment translations. In this case, the operating systems request the hypervisor to perform the segment translations invalidations on behalf of the operating system using the privileged 1 PSL SLB Invalidate All Register (PSL_SLBIA) facility.

 There is only one register for the PSL. Access to this register should be privileged. This register must be accessed using a single 64-bit store operation.

Access Type

Write

 Base Address Offset

 P1_Base + x'0090'

 Register Write Field Description:

Reserved

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

Reserved

IH

IQ

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

Bits

Field Name

Description

 0:58

 Reserved

 Set to zeros.

 59:61

 IH

 SLB invalidation hint (IH).

 The IH field is provided by system software as a hint that can be used to selectively invalidate entries in the implementation-specific look aside information.

000

Invalidate all implementation-specific lookaside information. (This is not a hint.)

001

Preserve implementation-specific lookaside information having a class value of '0'.

010

Preserve implementation-specific lookaside information created when MSR[IR/DR] = '0'. (This encoding is not valid for PSL implementations. Specific to the Power Architecture.)

110

Preserve implementation-specific lookaside information created when MSR[HV] = '1', MSR[PR] = '0', and MSR[IR/DR] = '0'.

(This encoding is not valid for PSL implementations. Specific to the Power Architecture.)

Other

All other IH values are reserved.

 62:63

 IQ

 SLB invalidation qualifier (IQ).

 The IQ field is used to selectively invalidate only the SLB entries based on the "LPID" or "PID and LPID" combination. The value for the PID and LPID is defined by the PSL_LBISEL Register.

0

Invalidate all SLBs.

1

Invalidate the SLBs matching the LPID.

1

Invalidate the SLBs matching the LPID and PID.

  Register Read Field Description:

 Reserved

 1

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

Reserved

P

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

Bits

Field Name

Description

 0:30

 Reserved

 Set to zeros.

 31

 Reserved

 Set to one.

 This field indicates the maximum number of outstanding SLB invalidate all commands supported. This field is set to '1' for TLB invalidate all commands.

 32:62

 Reserved

 Set to zeros.

 63

 P

 SLB invalidations pending.

 The SLB invalidation pending (P) field is used to determine when the previously issued SLB invalidations are complete. Issuing any additional SLB invalidates (that is, writing this register) when the number of invalidation pending is at the maximum may result in a SLB Invalidate being lost or discarded.

0

No SLB invalidate all commands are pending.

1

A SLB invalidate all command is pending.

[Note]Note

 The PSL SLB Invalidate All Register (PSL_SLBIA) for a PSL MMU clears the V bit of SLB entry 0. This differs from the Power ISA slbia instruction, which does not clear the V bit of SLB entry 0. The PSL should fully decode the IH field. Only encodes of '000' and '001' for the IH field are valid for PSL implementations. Hints involving when the implementation-specific lookaside information is created based on the MSR value is not known to the PSL.


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