Revision history   OpenPOWER Library

 10.1.4. PSL AFU Scratch Pad Offset Register (PSL_SPOffset_An)

 The PSL AFU Scratch Pad Offset Register (PSL_SPOffset_An) contains the offset in the memory attached to the PSL of the AFU's scratch pad memory. When operating in a virtualized programming model, the scratch pad can either be persistent or nonpersistent between context swaps. For the scratch pad to be persistent, the hypervisor must subdivide the adapter's memory into regions for each process. The scratch pad regions must not overlap.

 This register is initialized by the hypervisor or from the process element. The process element information is used when the PSL Scheduled Processes Area is enabled (PSL_SPAP_An[V] = '1').

 When the AFU is operating in a virtualized programming model, the data returned when reading this register is indeterminate. CAIA-compliant devices should return the corresponding process element data when an interrupt is pending for diagnostic purposes.

 There is one register for each PSL slice. Access to these registers should be privileged. These registers must be accessed using a single 64-bit store operation.

 This facility is optional. Reads of this register must return zeros when the PSL AFU Scratch Pad Memory is not supported or not enabled for the programming model. System software can detect if this feature is supported by writing x'7FFFFFFFFFFFF03F' to this register and reading back the contents. If a value of zero is returned, this feature is not supported. Any nonzero value indicates that the feature is supported.

Access Type

Read/Write

 Base Address Offset

 (P1_Base | P1(n)) + x'18'; where n is an AFU number.

E

P

SPOffset

 0

 1

 2

 3

 4

 5

 6

 7

 8

 9

 10

 11

 12

 13

 14

 15

 16

 17

 18

 19

 20

 21

 22

 23

 24

 25

 26

 27

 28

 29

 30

 31

SPOffset

Reserved

SPSIZE

 32

 33

 34

 35

 36

 37

 38

 39

 40

 41

 42

 43

 44

 45

 46

 47

 48

 49

 50

 51

 52

 53

 54

 55

 56

 57

 58

 59

 60

 61

 62

 63

  

Bits

Field Name

Description

 0

 E

 Enable.

 When this bit is set to '1', the AFU can use the region of memory attached to the PSL defined by the SPOffset and SPSIZE fields of this register as scratch pad memory.

 0 Scratch pad disabled.

 1 Scratch pad enabled.

 

Implementation Note:

 If the PSL implementation does not support a scratch pad memory for the AFU, this field must be read-only and returned as a '1'. System software can read the initial value or write a '0' to this field to determine the PSL's capability to support scratch pad memory.

 1

 P

 Persistent.

 When this bit is set to '1', the contents of the AFU's scratch pad memory is preserved between context swaps in a shared programming model.

0

Scratch pad contents not preserved.

1

Scratch pad contents preserved.

 2:51

 SPOffset

 Scratch pad offset.

 The SPOffset field in PSL_SPOffset_An contains the offset in the memory attached to the PSL allocated to the AFU for use as a scratch pad. The AFU's memory is constrained to lie on a 4 KB boundary. The number of low-order zero bits in SPOffset must be greater than or equal to the value in SPSIZE so that the scratch pad area is naturally aligned.

 The amount of memory attached to the PSL is implementation dependent. The upper address bits are ignored by the PSL.

 52:57

 Reserved

 Reserved.

 58:63

 SPSIZE

 Encoded size of scratch pad memory.

 The SPSIZE field in PSL_SPOffset_An contains an integer giving the number of bits (in addition to the minimum of 12 bits) defining the size of the AFU's scratch pad memory. The size of the scratch pad memory is 2(SPSIZE + 12) bytes.


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