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 10.1.2. PSL Logical Partition ID Register (PSL_LPID_An)

 The Power ISA provides a logical partitioning (LPAR) facility to permit processors and portions of main storage to be allocated to logical groups or partitions. For more information about the LPAR, see the Power ISA, Book III . The CAIA extends the LPAR facility to allow AFUs to also be assigned to partitions. The PSL Logical Partition ID Register (PSL_LPID_An) contains a value that identifies the partition to which an AFU is assigned.

 This register is initialized by the hypervisor or from the process element. The process element information is used when the PSL Scheduled Processes Area is enabled (PSL_SPAP_An[V] = '1').

 When the AFU is operating in a virtualized programming model, the data returned when reading this register is indeterminate. CAIA-compliant devices should return the corresponding process element data when an interrupt is pending for diagnostic purposes.

 There is one register for each PSL slice. Access to these registers should be privileged. These registers must be accessed using a single 64-bit store operation.

  

Access Type

Read/Write

 Base Address Offset

 (P1_Base | P1(n)) + x'08' ; where n is an AFU number.

Reserved

 0

 1

 2

 3

 4

 5

 6

 7

 8

 9

 10

 11

 12

 13

 14

 15

 16

 17

 18

 19

 20

 21

 22

 23

 24

 25

 26

 27

 28

 29

 30

 31

LPID

 32

 33

 34

 35

 36

 37

 38

 39

 40

 41

 42

 43

 44

 45

 46

 47

 48

 49

 50

 51

 52

 53

 54

 55

 56

 57

 58

 59

 60

 61

 62

 63

Bits

Field Name

Description

 0:31

 Reserved

 Reserved.

 32:63

 LPID

 Logical partition ID.

  


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