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 10.1.15. PSL IVTE Limit Register (PSL_IVTE_Limit_An)

 The PSL IVTE Limit Register (PSL_IVTE_Limit_An) allows system software to govern the interrupt vector table entries (IVTEs) used by the corresponding AFU. This register allows system software to select 1 - 4 independent ranges of IVTEs. The ranges start at the corresponding interrupt vector offset (PSL_IVTE_Offset_An[IVTE_Offset_0]). The AFU's logical interrupt source number (AFU_LISN) are mapped to these ranges using the following equations. The AFU_LISN must be between in the range 1 AFU_LISN (Max_Ints - 1). The maximum number of interrupts (Max_Ints) is the sum of the interrupt ranges (PSL_IVTE_Limit_An[IVTE_Range_x]).

IVTE = PSL_IVTE_Offset_An[IVTE_Offset_0] + AFU_LISN; 
         when  (1 =< AFU_LISN < PSL_IVTE_Limit_An[IVTE_Range_0]) 
         AND   (PSL_IVTE_Limit_An[IVTE_Range_0] != 0)
       else
IVTE = PSL_IVTE_Offset_An[IVTE_Offset_1] + 
       ( AFU_LISN - PSL_IVTE_Limit_An[IVTE_Range_0] ); 
         when  ( (PSL_IVTE_Limit_An[IVTE_Range_0])
               =< AFU_LISN < (PSL_IVTE_Limit_An[IVTE_Range_0] + 
                              PSL_IVTE_Limit_An[IVTE_Range_1]) ) 
         AND   (PSL_IVTE_Limit_An[IVTE_Range_1] != 0)
       else
IVTE = PSL_IVTE_Offset_An[IVTE_Offset_2] + 
       ( AFU_LISN - (PSL_IVTE_Limit_An[IVTE_Range_0] + 
                     PSL_IVTE_Limit_An[IVTE_Range_1]) ); 
         when ( (PSL_IVTE_Limit_An[IVTE_Range_0] + PSL_IVTE_Limit_An[IVTE_Range_1])
               =< AFU_LISN  <  
                (PSL_IVTE_Limit_An[IVTE_Range_0] + 
                 PSL_IVTE_Limit_An[IVTE_Range_1] +
                 PSL_IVTE_Limit_An[IVTE_Range_2]) )
         AND (PSL_IVTE_Limit_An[IVTE_Range_2] != 0)
       else
IVTE = PSL_IVTE_Offset_An[IVTE_Offset_3] + 
       ( AFU_LISN - (PSL_IVTE_Limit_An[IVTE_Range_0] + 
                     PSL_IVTE_Limit_An[IVTE_Range_1] +
                     PSL_IVTE_Limit_An[IVTE_Range_2]) );
         when ( (PSL_IVTE_Limit_An[IVTE_Range_0] + 
                 PSL_IVTE_Limit_An[IVTE_Range_1] +
                 PSL_IVTE_Limit_An[IVTE_Range_2])
         =< AFU_LISN < 
                (PSL_IVTE_Limit_An[IVTE_Range_0] + 
                 PSL_IVTE_Limit_An[IVTE_Range_1] +
                 PSL_IVTE_Limit_An[IVTE_Range_2] + 
                 PSL_IVTE_Limit_An[IVTE_Range_3]) ) 
         AND (PSL_IVTE_Limit_An[IVTE_Range_3] != 0)
       else

No IVTE is generated and No Interrupt is sent for the AFU.


 Note: For PSL interrupts reported in the PSL_DSISR_An Register, the IVTE is PSL_IVTE_Offset_An[IVTE_Offset_0] (a LISN of zero). For PSL error interrupts, the IVTE is sourced directly from the PSL_ErrIVTE register. The AFU_LISN must be between in the range 1 AFU_LISN < (Max_Ints - 1). The maximum number of interrupts (Max_Ints) is the sum of the interrupt ranges (PSL_IVTE_Limit_An[IVTE_Range_x]).

 This register is initialized by the hypervisor or from the process element. The process element information is used when the PSL scheduled processes area is enabled (PSL_SPAP_An[V] = '1').

 When the AFU is operating in a virtualized programming model, the data returned when reading this register is indeterminate. CAIA-compliant devices should return the corresponding process element data when an interrupt is pending for diagnostic purposes.

 There is one register for each PSL slice. Access to these registers should be privileged. These registers must be accessed using a single 64-bit store operation.

Access Type

Read/Write

 Base Address Offset

 P1_Base | P1(n)) + x'B8'; where n is an AFU number.

Int_Range_0

Int_Range_1

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

Int_Range_2

Int_Range_3

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

Bits

Field Name

Description

 0:15

 Int_Range_0

 Interrupt range 0.

 The Int_Range_0 defines the number of interrupts within the range starting at the corresponding interrupt vector (PSL_IVTE_An[IVTE_Offset_0]).

 Int_Range_Size_0 must be greater than or equal to 1.

 The PSL uses the first interrupt in this range (PSL_IVTE_An[IVTE_Offset_0]) for translation faults and errors reported using the PSL_DSISR_An Register.

 System software can write this field to x'FFFF' and read back the maximum range value supported by the PSL.

 16:31

 Int_Range_1

 Interrupt range 1.

 The Int_Range_S1 defines the number of interrupts within the range starting at the corresponding interrupt vector (PSL_IVTE_An[IVTE_Offset_1]).

 A size of zero disables this interrupt range.

 System software can write this field to x'FFFF' and read back the maximum range value supported by the PSL.

 32:47

 Int_Range_2

 Interrupt range 2

 The Int_Range_2 defines the number of interrupts within the range starting at the corresponding interrupt vector (PSL_IVTE_An[IVTE_Offset_2]).

 A size of zero disables this interrupt range.

 System software can write this field to x'FFFF' and read back the maximum range value supported by the PSL.

 48:63

 Int_Range_3

 Interrupt range 3.

 The Int_Range_3 defines the number of interrupts within the range starting at the corresponding interrupt vector (PSL_IVTE_An[IVTE_Offset_3]).

 A size of zero disables this interrupt range.

 System software can write this field to x'FFFF' and read back the maximum range value supported by the PSL.

  


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