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 10.2.8. PSL Data Address Register (PSL_DAR_An)

 The PSL Data Address Register (PSL_DAR_An) contains the effective address associated with a PSL data segment interrupt or a PSL data storage interrupt. The function of this register is similar to the POWER Data Address Register (DAR). For more information about the DAR, see the Power ISA, Book III .

 There is one register for each PSL slice. Access to these registers should be privileged. These registers must be accessed using a single 64-bit store operation.

Access Type

Read Only

 Base Address Offset

 (P2_Base |P2(n)) + x'0068'; where n is an AFU number.

Effective Address

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

Effective Address

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

Bits

Field Name

Description

 0:63

 Effective Address

 Effective address associated with the data segment or data storage interrupt.


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