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 10.2.12. PSL Error Status Register (PSL_ErrStat_An)

 PSL Error Status Register (PSL_ErrStat_An) contains the error status for interrupts reported by the PSL_DSISR_An[PE] error. This register is set when the PSL detects a recoverable error on the associated slice.

 System software should record the errors reported with this interrupt in the system error log. System software should also write the same value back to this register to reset the status.

 There is one register for each PSL slice. Access to these registers should be privileged. These registers must be accessed using a single 64-bit store operation.

Access Type

Read/Write

 Base Address Offset

 (P2_Base | P2(n)) + x'0088'; where n is an AFU number.

Implementation Dependent

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

Implementation Dependent

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

Bits

Field Name

Description

 0:63

 Implementation

Dependent

 Reserved for implementation-dependent PSL errors.

 Bits in this field are set to '1' if the PSL has detected the corresponding error condition. Additional status information about the error might be available in an implementation-specific register. Bits in this field are reset to '0' when this register is written with the corresponding bit set to '1'.


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